1. Field of the Invention
The present invention relates to a microcomputer, and more particularly to a microcomputer in which memory efficiency for storing a program is improved and a high addressing flexibility can be provided.
2. Description of Prior Art
FIG. 3 is a diagram showing the contents of a program memory in a conventional microcomputer.
Referring to FIG. 3, a program memory 1 and includes sections 2, 3, and 4 storing codes or data written in the program memory 1. The program memory 1 includes function designating sections 2 holding codes for designating the type of function performed by an instruction, address mode designating sections 3 holding information for calculating an effective address, and parameter holding sections 4 holding parameters being data for calculating the effective address or data for functions. Referring to FIG. 3, first function designating section, address designating section, and parameter designating sections 2a, 3a, 4a, and 4b form one instruction and second function designating section, address designating section, and parameter designating sections 2b, 3b, 4c, and 4d form another instruction.
The microcomputer reads the function code parts of those instruction functions so as to decide a processing to be performed. Then, the microcomputer reads information relating to the effective address so as to decide an addressing mode and reads a parameter sequential to the information of the effective address, so that the effective address is generated. Data designated by the generated effective address is processed as decided previously. Those serial processes are performed for each instruction, so that the microcomputer performs a program which is a congregation of considerable number of instructions.
FIG. 4 shows main parts of the conventional microcomputer having the above mentioned memory structure. Referring to the FIGURE, the microcomputer comprises an exclusive read only memory ROM 11, a random access memory RAM 12, peripherals 13 including input/output unit, and a CPU 14, and those members are connected to each other through an address bus 15a, a data bus 15b, and a control bus 15c. On the other hand, the CPU 14 comprises a bus interface 14a, a prefetch buffer 14b which temporarily stores a read-in program, a data buffer 14c which temporarily stores data at memory access, a pattern ROM 14d, a pattern ROM address decoder 14e, and an execution unit 14f.
The bus interface 14a reads in a program from the ROM/RAM if there is a space in the prefetch buffer 14b, and sends an operation code to the pattern ROM address decoder 14e if the execution unit 14f requests an operation code. And, if the execution unit 14f requests an immediate data, an immediate data is sent to the execution unit 14f, and if the execution unit 14f requests a memory access, a memory is accessed. The pattern ROM address decoder 14e generates an address of the pattern ROM 14d to be accessed next in accordance with an operation code from the prefetch buffer 14b or the address from the pattern ROM 14d. The execution unit 14f operates in accordance with a pattern which is read out from the pattern ROM 14d.
The conventional microcomputer is constructed as described above. In such a microcomputer, however, the demand for improved functionality and high performance has caused the number of functions types and addressing mode included in the instruction set to increase. However, the instructions including the various function types and addressing modes cannot be stored in one byte, i.e., 8 bits, which is the minimum unit of memory management. At least 2-bytes of 3-bytes of memory is necessary to store such high performance instructions. Further, additional bytes of parameters data for calculating effective addresses are generally required thus further increasing the number of bytes necessary to store the instructions.
In addition, since only a limited number of types of addressing modes have been previously programmed and are available in the microcomputer, when a user of the microcomputer uses an addressing form which had not been prepared previously an is not available in the microcomputer for a specific function, it will be necessary that a routine made by a combination of instructions be placed before an instruction that requires the specific function to generate its effective address, or the routine can be in the form of a sub-routine with an instruction for calling the sub-routine placed before it. Thus, software will be necessary to perform the specific function.